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Zylogic ZE5 Configurable System-on-Chip Platform

www.Zylogic.com.cn 22

Configurable System Logic (CSL)

The Configurable System Logic (CSL) matrix pro-

vides flexible, programmable resources to build

almost any digital function. Because it is intimately

connected to the CSI bus, the CSL matrix is ideal

for building any “soft” module functions required by

the MCU. The matrix consists of multiple CSL

banks. Each bank is a rectangular array of indi-

vidual CSL cells.

The number of CSL banks varies by part number.

The highest-density ZE5 family device, the ZE532,

contains 25 CSL banks, arranged in a 5x5 array as

shown in Figure 19 and Table 6. The smallest

member, the ZE502, has just two CSL banks, ar-

ranged in a 2x1 array.

TE505 (2x2)

TE512 (3x3)

TE520 (4x4)

TE532 (5x5)

TE502 (2x1)

Figure 19. The five member of the ZE5 CSoC devic family range in density from two CSL banks

(256 CSL cells) up to 25 CSL banks (3,200 CSL cells).

Sideband Interface

CSL

Bank

CSL

Bank

CSL

Bank

CSL

Bank

CSL

Bank

CSL

Bank

CSL

Bank

CSL

Bank

CSL

Bank

Vertical Breakers

Horizontal Breakers

Figure 20. Vertical and horizontal breakers separate the individual CSL banks with Configurable

System Interconnect (CSI) bus resources.

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